ASIC design flow optimisation (Analog design re-use, IP based design)

The main objective of this work is to improve the design flow of the analogue and mixed neuromimetic ASICs, that actually reach a high degree of complexity. Purely digital systems profit from standardized tools and methods which allow automatic synthesis. In the analogue domain, automatic synthesis has probably no sense but efforts must be done towards formalism and automation.
The main idea is to re-use the accumulated design knowledge which could be illustrated by the IP (Intellectual Property) and to try to automate some recurrent tasks and decisions in analogue IC design.
This work addresses three issues of analogue design re-use :
- Representation of an analogue IP
- IP-based library and automatic design space exploration
- Resizing of analogue circuits